发明名称 Method for manufacturing a chip scale package
摘要 A method for manufacturing a chip scale package comprises preparing a tape wiring board that includes a polyimide tape having top and bottom surfaces, Cu traces formed on the bottom surface of the tape, a window formed in the tape to enable the Cu traces to be connected to a semiconductor chip attached below the board, multiple connection holes formed in the tape to expose portions of the Cu traces therethrough and define solder ball mounting pads, and an elastomer chip carrier attached to the bottom surface of the tape. The method includes applying either a pre-flux or a cover sheet over the solder ball mounting pads. The pre-flux and the cover sheet each prevents the solder ball mounting pads being plated with gold. This, in turn, prevents the formation of intermetallic compounds in the solder balls so that the bond strength between the solder balls and a pad to which they attach is improved.
申请公布号 US2002048951(A1) 申请公布日期 2002.04.25
申请号 US20010891116 申请日期 2001.06.25
申请人 JEONG DO SOO;SOHN HAI JEONG;LEE DONG HO 发明人 JEONG DO SOO;SOHN HAI JEONG;LEE DONG HO
分类号 H01L23/12;H01L21/60;H01L23/31;H01L23/495;(IPC1-7):H01L21/48;H01L21/50 主分类号 H01L23/12
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