| 摘要 |
A semiconductor test system for testing a semiconductor device by applying a test pattern to a device under test. The semiconductor test system is capable of generating test patterns based on predetermined algorithmic sequences and/or inverting data pattern in the test pattern based on predetermined algorithmic sequences. The semiconductor test system is capable of utilizing the same pattern program for different test items, thereby enabling to decrease the required capacity in an instruction memory. Especially, generation of inversion control signal can be made by using the same pattern program without increasing the capacity of the instruction memory.
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