| 摘要 |
The present invention resolves the problems of conventional top down hierarchical layout design methods by including the following in a top down hierarchical layout design method using soft block, in addition to determining the arrangement of block pin (called "soft pin") in soft block, generating second block pin having the same potential as existing block pin; and moving block pin position to position opposite the block pin to be connected. The layout tool program of the present invention is therefore provided the functions of moving and generating soft pin, whereby the top level signal wiring in the region among the blocks is optimized, delay time is minimized, and the use of wasteful wiring channel is avoided for any combination of blocks.
|
