发明名称 System for clock recovery
摘要 A decoding system having a clock recovery system for maintaining the optimum time for sampling a signal. The clock recovery system is particularly useful in decoding 1 Mbps signals for two-level Gaussian frequency shift key (GFSK) modulation and 2 Mbps signals for four-level Gaussian frequency shift key (GFSK) modulation. The clock recovery system remains reliable with temperature variations, and maintains a stable frequency independent of data pattern.
申请公布号 US6377642(B1) 申请公布日期 2002.04.23
申请号 US19990267923 申请日期 1999.02.26
申请人 CISCO TECHNOLOGIES, INC. 发明人 DOLLARD MICHAEL S.
分类号 H04L7/033;(IPC1-7):H04L7/00;H04L27/06 主分类号 H04L7/033
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