Expanded lead pitch for semiconductor package and method of electrical testing

摘要

The invention relates to packages of semiconductor devices, specifically of the surface mount and Quad Flat Pack families, that can be used in current semiconductor device production, and to a method of automated testing. The packages have a plurality of insulating tie bars supporting a multitude of leads. The tie bars are designed so that they comprise celectrically conductive vias in a pattern expanding the effective lead pitch for more convenient testing, without introducing unwanted side effects. The full benefit of the expanded lead pitch can be exploited during the electrical testing of the device which utilizes a test apparatus simplified for an automated testing procedure. The base of the apparatus includes a multitude of electrically conductive and mechanically elastic passageways with surface contours adapted for contacting the metallic end connectors of the semiconductor device-to-be-tested, as well as the metallic connector to the tester.