发明名称 PULSE DETECTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To solve the problem of the control of a correct pulse width being difficult, due to the quantity of delays of a delay buffer changes depending on a process variation or a temperature. SOLUTION: The fact that the number of stages of the delay buffer in an offset section A 23 is hardly affected by the process variation, and the temperature and is always fixed, is utilized. The number of stages of a delay buffer obtained by subtracting the number of stages of the delay buffer in a offset section A23 from the number of stages of a delay buffer in a section, where a detection counter 2n turns into n is determined, and the number of stages of a delay buffer for one cycle of a reference clock is determined. The number of stages of the delay buffer for one cycle of the reference clock can be determined automatically, by automatically detecting the number of stages of the delay buffer in the offset section A23.
申请公布号 JP2002117623(A) 申请公布日期 2002.04.19
申请号 JP20000309964 申请日期 2000.10.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SADATE MAKI;KANENO TATSUYA
分类号 G11B20/10;(IPC1-7):G11B20/10 主分类号 G11B20/10
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