CLOCK-SWITCHING CIRCUIT AND MEMORY DEVICE HAVING THE CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a clock-switching circuit, in which noise is not generated at switching of clock. SOLUTION: A state of whether a clock signal 'clock' A and a clock signal 'clock' B are selected to a clock selecting signal CLK-SEL is detected, the detection state is recorded in flip-flops 11, 13, synchronizing with a corresponding clock signal. Also, it is detected whether the state recorded in the flip-flop 11, 13 is a first selected state in which the other clock signal is made a non- selection state or a second state in which the other clock signal is made a selected state, and the detected state is recorded in flip-flop 12, 14 in synchronization with a corresponding clock signal. A clock signal, in which a selection state is recorded in the flip-flops 11, 13 and the first selection state is recorded in the flip-flops 12, 14, is selected and outputted from an OR circuit 31.