| 摘要 |
The application provides a semiconductor memory device having a redundancy scheme circuit with a large flexibility, wherein a plurality of fuse columns (111, 113) is driven by address signals (X1, X1). By cutting the fuse elements (FAi), a word line (WLA(2-i) or WLA 2i) to be activated by a row driver (RDri) on logic address is replaced with a word line (WLA(2+i) or WLA(2i+2)) to be activated by a row driver (RDr(i+1)) on logic address. <IMAGE> |
