DATA FOR DOUBLE DATA RATE MEMORY, DATA STROBE CIRCUIT, AND OPERATING PROTOCOL

摘要

PURPOSE: A data for a double data rate memory, a data strobe circuit, and an operating protocol are provided to make a data eye small and a data transmission rate rapid by permitting a usage of a high frequency memory clock. CONSTITUTION: A write circuit(118a) has a data line receiver(30) which is combined to each data line out of a plurality of data lines in a data bus(17) to a storage array(21) through a data buffer circuit(131), a delay circuit(32), and a multi latch circuit(33). The data buffer circuit(131) of the write circuit(118a) is combined with a strobe generator(149) through a one-shot circuit(142a). Similarly, the write circuit(118a) is combined with the strobe generator(149) through a one-shot circuit(142b). A writing unit(123a) of a strobe circuit has a receiver(140) which is combined with a control unit through a strobe signal line(22) and combined with a strobe buffer circuit(141) an output thereof is combined with the strobe generator(149) through a one-shot circuit(143).