发明名称 Integrated circuit with multiprocessor architecture
摘要 A first processor, a second processor, a memory and a clock supply unit are integrated together on a single chip. The first processor operates synchronously with a first internal clock signal. The second processor operates synchronously with a second internal clock signal. The memory operates synchronously with a third internal clock signal. The clock supply unit generates three clock signals, which are in phase with each other, from an external clock signal and supplies those clock signals as the first, second and third internal clock signals. The first and second processors share the memory via a data bus. Each of the processors has an internal reset signal.
申请公布号 US2002046356(A1) 申请公布日期 2002.04.18
申请号 US20010973888 申请日期 2001.10.11
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 OKABAYASHI KAZUHIRO;OKAMOTO MINORU;MARUI SHINICHI
分类号 G11C7/22;(IPC1-7):G06F1/04 主分类号 G11C7/22
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