发明名称 UNIVERSAL POST-PROCESSOR FOR SUPPRESSING INTERFERENCE SIGNAL
摘要 PURPOSE: A universal post-processor for suppressing an interference signal is provided to improve a bit error performance and call quality and increase the capacity of a base station by suppressing several interference signals using a CMA(Constant Modules Algorithm). CONSTITUTION: The first delays(21-1¯21-K) delay each user-classified signal divided in th receiver and detector according to a primary symbol period. The second delays(22-1¯22-K) delay the signals delayed in the first delays(21-1¯21-K) again according to a secondary symbol period. A plurality of the first to third amplifiers(23-1¯23-K,24-1¯24-K,25-1¯25-K) receive the signals outputted from the second delays(22-1¯22-K), the signals outputted from the first delays(21-1¯21-K), and signals inputted to the first delays(21-1¯21-K), and amplifies the received signals according to coefficient vectors. A plurality of the first adders(26-1¯26-K) add the signals outputted from the first to third amplifiers(23-1¯23-K,24-1¯24-K,25-1¯25-K). The second adder(27) adds the signals outputted from the first adders(26-1¯26-K) again. A CMA coefficient vector updating unit(28) updates the coefficient vectors of the first to third amplifiers(23-1¯23-K,24-1¯24-K,25-1¯25-K) according to the signal outputted from the second adder(27). A filter(29) filters the signal outputted from the second adder(27) and outputs a signal in which an interference signal is suppressed to a decoder.
申请公布号 KR20020028500(A) 申请公布日期 2002.04.17
申请号 KR20000059528 申请日期 2000.10.10
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LIM, SANG HUN;OH, JEONG HO
分类号 H04B17/00;(IPC1-7):H04B17/00 主分类号 H04B17/00
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