发明名称 |
Test insert containing vias for interfacing a device containing contact bumps with a test substrate |
摘要 |
An insert is provided for testing a chip-scale-packaged microelectronic device having an encapsulant-protrusion and a ball-grid-array of outwardly-projecting contacts. The insert comprises a substrate of mono-crystalline silicon. Walls of the substrate define a plurality of pockets that are configured to receive and contact the outwardly-projecting contacts of the microelectronic device. Additional walls of the substrate define a recess disposed amongst the plurality of pockets. The recess has a width greater than the widths of any of the pockets. Additionally, the recess comprises a perimeter greater than that of the encapsulant-protrusion of the chip-scale-packaged microelectronic device, and a depth operative to clear the encapsulant-protrusion when the chip-scale package is seated upon the insert.
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申请公布号 |
US6373273(B2) |
申请公布日期 |
2002.04.16 |
申请号 |
US20010916771 |
申请日期 |
2001.07.27 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
AKRAM SALMAN;HEMBREE DAVID R. |
分类号 |
G01R1/04;H01L23/13;H01L23/498;(IPC1-7):G01R31/02;G01R31/26;H01L29/40 |
主分类号 |
G01R1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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