发明名称 |
CMOS semiconductor device |
摘要 |
A semiconductor device includes a PMOS transistor and an NMOS transistor. In a standby state, a potential of Vcc level is applied to the substrate of the PMOS transistor and a potential of Vss level is applied to the substrate of the NMOS transistor. Therefore, the voltage between the source and substrate of the P and NMOS transistors becomes 0 V. In an active state, potentials that render the voltage between the source and substrate lower than the built-in potential are applied to respective substrates of the P and NMOS transistors. Therefore, the threshold voltage of the transistor is lowered in an active state than in a standby state, and almost no leakage current flows between the source and substrate.
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申请公布号 |
US6373321(B1) |
申请公布日期 |
2002.04.16 |
申请号 |
US19980140315 |
申请日期 |
1998.08.26 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
YAMAUCHI TADAAKI;ARIMOTO KAZUTAMI |
分类号 |
H01L21/822;G11C11/408;H01L21/8238;H01L27/02;H01L27/04;H01L27/092;H03K19/0175;H03K19/094;H03K19/0948;(IPC1-7):G05F3/16;H03K17/16 |
主分类号 |
H01L21/822 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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