发明名称 SRAM device
摘要 An SRAM device includes: a plurality of normal memory blocks each including N normal memory cells for storing data, wherein N is a natural number; a spare memory block including one or more spare memory cells for storing data; a defective block setting section for storing first defective block information indicating a normal memory block including a defective normal memory cell among the plurality of normal memory blocks; N internal data lines which are respectively coupled to the N normal memory cells included in each of the plurality of normal memory blocks, where the N internal data lines are used for reading data stored in the N normal memory cells included in one of the plurality of normal memory blocks which is designated by access information, wherein the access information is externally input to the SRAM device; one or more spare data lines coupled to the spare memory block for reading data from the one or more spare memory cells included in the spare memory block; N external data lines via which the SRAM device outputs the data; and a coupling circuit for, depending on whether or not the first defective block information matches the access information, either coupling those of the N internal data lines which are not coupled to a defective normal memory cell in the normal memory block indicated by the first defective block information and at least one of the one or more spare data lines to the N external data lines, or coupling the N internal data lines to the N external data lines.
申请公布号 US6373759(B2) 申请公布日期 2002.04.16
申请号 US20010823102 申请日期 2001.03.30
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 YAMAUCHI HIROYUKI
分类号 G11C29/00;(IPC1-7):G11C7/00 主分类号 G11C29/00
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