发明名称 Low voltage differential logic
摘要 A low voltage differential circuit is described herein including a complementary logic tree having first, second and third inputs and two outputs, the logic tree for performing a desired logical function on signals received the the first input, thereby opening a pathway for current flow between at least one of the following: the second input and the first output, the second input and the second output, the third input and the first output, the third input and the second output. The circuit further includes a first transistor having a first gate, a first source, and a first drain, the first drain connected to the first output, the first source being connected to a supply voltage, a second transistor having a second gate, a second source, and a second drain, the second source connected to the first gate, the second drain connected to the first drain; and a third transistor having a third gate, a third source, and a third drain, the third source being connected to a supply voltage, the third gate being connected to the second drain, the third drain connected to the second source and the second output.
申请公布号 US6373292(B1) 申请公布日期 2002.04.16
申请号 US19990467547 申请日期 1999.12.10
申请人 SUN MICROSYSTEMS, INC. 发明人 CHOE SWEE YEW
分类号 H03K19/173;(IPC1-7):H03K19/20;H03K19/094 主分类号 H03K19/173
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