发明名称 Semiconductor integrated circuit device having fuses and fuse latch circuits
摘要 A semiconductor integrated circuit device has a semiconductor integrated circuit with first layout sections where fuses are laid out and second layout sections where fuse latch circuits, which correspond to the fuses, are laid out. The first layout sections are disposed in a first repetition pitch in a fuse area, while the second layout sections are laid out at a second repetition pitch smaller than the first repetition pitch in a fuse latch circuit area. A third layout section is laid out in a space caused by the difference between the first and second repetition pitches. In the third layout section, at least one of patterns which are unrepeatable in each of the second layout sections and the patterns which do not need to be repeated in each of the second layout sections.
申请公布号 US6373772(B2) 申请公布日期 2002.04.16
申请号 US20010886490 申请日期 2001.06.22
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KATO DAISUKE;WATANABE YOHJI
分类号 G11C11/41;G11C5/02;G11C16/06;G11C17/14;G11C29/00;G11C29/04;H01L21/82;H01L21/8242;H01L27/10;H01L27/108;(IPC1-7):G11C7/00 主分类号 G11C11/41
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