| 摘要 |
A method of manufacturing non-volatile memory enables a junction capacitance to be increased between a control gate and a floating gate and realizes low voltage and high speed operation by virtue of adaptation of chemical mechanical polishing technology and dry etching technology with the exception that it causes cell area to be increased. There is provided with floating gates formed on a semiconductor-substrate through a first gate insulating film, a control gate which is subjected to capacitive junction to the floating gates through a second gate insulating film. The floating gates have deeper concave shape than a regular concave shape which is formed on a semiconductor-substrate while reflecting shape-of-substrates. There is provided a second gate insulating film at least on the inside surface of concave shaped side wall of the floating gates.
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