发明名称 Method for fabricating wafer level chip scale package with discrete package encapsulation
摘要 A method for fabricating a wafer level chip scale package with discrete package encapsulation and devices formed by the method are described. A dry film photoresist layer is first deposited on top of a pre-processed wafer complete with a plurality of bond pads and an I/O redistribution metal layer. The dry film photoresist layer is then patterned to form a plurality of trench openings and a plurality of via openings followed by the process of depositing a liquid photoresist material into the plurality of trench openings and plating a conductive metal into the plurality of via openings to form via plugs. After the dry film photoresist layer is removed, an encapsulant layer is printed on top of the wafer to embed the protrusions formed by the liquid photoresist material and the via plugs.
申请公布号 US6372619(B1) 申请公布日期 2002.04.16
申请号 US20010918085 申请日期 2001.07.30
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD 发明人 HUANG CHENDER;TSAO PEI-HWA
分类号 H01L21/60;H01L23/31;H01L23/485;(IPC1-7):H01L21/28 主分类号 H01L21/60
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