发明名称
摘要 PROBLEM TO BE SOLVED: To suppress variation in a pair of transistors for improved circuit characteristics by, related to an MOSFET, arranging the longitudinal direction of a gate pattern in the direction orthogonal to the operating direction at scan stepper exposure, and placing a part of the gate pattern where a contact hole is arranged on a chip center-line side. SOLUTION: The longitudinal direction of each gate pattern 17 is arranged in the direction orthogonal to the operating direction at scan stepper exposure, and a part where a contact pattern 18 is arranged is put on a chip center-line side. Here, Tr1 and Tr2 are such MOSFET as functions, as a pair, in a circuit like, for example, NchMOSFET of a flip-flop, each gate and drain are connected to a complementary signal line 15. Here, since the contact pattern 18 is arranged on the chip center side of each gate pattern 17, the gate pattern is set wider at that part on a mask pattern, eliminating a thin gate pattern line width.
申请公布号 JP3275310(B2) 申请公布日期 2002.04.15
申请号 JP19990169561 申请日期 1999.06.16
申请人 发明人
分类号 H01L21/027;G03F7/20;H01L21/28;H01L21/8234;H01L27/088;(IPC1-7):H01L21/823 主分类号 H01L21/027
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