发明名称
摘要 A semiconductor integrated circuit device comprises, on a semiconductor chip (100), a large-scale memory (1) as a main memory, a controller (2) for controlling at least inputting data from the outside of the chip (100) to the large-scale memory (1), and outputting data from the large-scale memory (1) to the outside of the chip (100), and a self-test circuit (3) for testing the large-scale memory (1). The self-test circuit includes a rewritable EEPROM (34), into which a self-test sequence is written. The self-test circuit (3) tests the large-scale memory (1) in accordance with the self-test sequence written in the EEPROM (34). <IMAGE>
申请公布号 JP3274332(B2) 申请公布日期 2002.04.15
申请号 JP19950310619 申请日期 1995.11.29
申请人 发明人
分类号 G01R31/28;G06F11/22;G06F12/16;G11C29/02;G11C29/04;G11C29/08;G11C29/12;G11C29/24;G11C29/36;H01L21/66;(IPC1-7):G01R31/28;G11C29/00 主分类号 G01R31/28
代理机构 代理人
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