| 摘要 |
PURPOSE: Semiconductor integrated circuit device including tester circuit for defective memory cell replacement is provided to realize a semiconductor memory device or a semiconductor integrated circuit device incorporating a semiconductor memory device including a built-in tester circuit that detects, when a plurality of memory cells are selected simultaneously for every sub memory cell array, a defective memory cell, and replace the defective memory cell with a redundant memory cell. CONSTITUTION: DRAM(1000) includes a control signal input terminal group(11) receiving control signals such as a row address strobe signal /RAS, a column address strobe signal /CAS, a write enable signal /WE, a chip enable signal /CE and a clock enable signal CKE, an address input terminal group(13) receiving address signals A0-Ai (i: natural number), a data input/output terminal group(15) to input/output data, a Vcc terminal(18) receiving an external power supply potential Vcc, and a Vss terminal(19) receiving a ground potential Vss.
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