METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WHEREIN ISOLATION FIELD RECESS IS REDUCED IN SALICIDE LAYER FORMATION REGION

摘要

PURPOSE: A method for fabricating a semiconductor device wherein an isolation field recess is reduced in a salicide layer formation region is provided to prevent or at least minimize a decrease of a threshold voltage, an increase of a sub threshold leakage or a hump phenomenon, by easily fabricating a high resistance device without a field region recess in the salicide layer formation region. CONSTITUTION: An isolation region is formed on a semiconductor substrate(2), and a gate electrode and a sidewall spacer are formed in a device region. A metal layer and the first insulation layer which constitute a salicide layer(15) are sequentially deposited. After a high resistance device formation region is defined by a photolithography process, the first insulation layer and the metal layer existing only on the defined high resistance device are eliminated by an etch process. A heat treatment process is performed regarding the resultant structure so that the metal layer reacts with a layer including silicon to form the salicide layer only in the high resistance device formation region. The first insulation layer remaining on the resultant structure and the remaining metal layer are eliminated.