| 摘要 |
PROBLEM TO BE SOLVED: To provide a technology for reducing the continuity resistance of a field-effect transistor. SOLUTION: Related to a field-effect transistor 1, a first base region 29 is formed on the surface of a drain layer 12 where a plurality of holes are formed, with a second base region 29 formed on the internal bottom surface of the hole. With a voltage applied between source regions 43 and 44 and the drain layer 12, when a voltage equal to or higher than a threshold voltage is applied to a gate electrode film 22, an inversion layer is formed in the base regions 29 and 28, and there is a state of continuity. Then a depleted layer expands outside the base regions 29 and 28, however, the interval between the base regions 29 and 28 is larger by the depth of the hole as compared with a conventional case, where the base regions are arranged on the same plane. So, the depleted layers do not connect each other unlike in conventional cases, and a gap between the depleted layers is produced. Since current flows the gap, a continuity resistance becomes lower than in the conventional case, where a current has to flow the depleted layer of high resistance.
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