| 摘要 |
PROBLEM TO BE SOLVED: To provide a gray code counter to attain speed-up of operational speed with a combination of logic circuits having less number of stages by analyzing changing states of gray codes. SOLUTION: A gray code counter 100 counts a click signal (CLK) to output a 4 bits gray code responding to the counted value. The counter 100 comprises D-type flip-flop circuits 111, 121, 131 and 141 of a first to a fourth stage indicate each bit value (Q[0]-Q[3]) of a first to a fourth bit and a D-type flip-flop circuit 101 to determine which bit value should be reversed. As a whole, a gray code counter having less number of stages is attained by using a Q output (Q[00]) from the circuit 101.
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