发明名称 CHIP SCALE PACKAGE, PRINTED CIRCUIT BOARD AND METHOD FOR DESIGNING PRINTED CIRCUIT BOARD
摘要 PURPOSE: A chip scale package, a printed circuit board and a method for designing the printed circuit board are provided to reduce the number of a substrate layer and the cost by using an external terminal and a land structure. CONSTITUTION: A first layer is provided with a chip scale package attached thereto and includes eight chip scale package regions(30-1,..., 30-8) arranged in a line. Each of the eight chip scale package regions(30-1,...,30-8) includes first and second land sets(46,47). Each of the first and second land sets(46,47) is arranged on a plurality of rows and columns corresponding to the arrangement of balls of the chip scale package and connected to first and second ball sets provided on the chip scale package. Thus, the first land set(46) is provided on one side of the respective chip scale package regions(30-1,...,30-8) and the second land set(47) is provided on the remaining side thereof.
申请公布号 KR20020026808(A) 申请公布日期 2002.04.12
申请号 KR20010053931 申请日期 2001.09.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, DONG HO;LEE, SANG WON;PARK, MYEON JU;SO, BYEONG SE
分类号 H05K1/09;H01L23/498;H05K1/02;H05K1/11 主分类号 H05K1/09
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