| 摘要 |
PROBLEM TO BE SOLVED: To provide an estimation circuit for an interference signal amount, which reduces the computation amount related to the detection of the estimated value of precise interference power and which reduces the scale of hardware and a power consumption. SOLUTION: The delay output of a delay device 11 and the delay output of a delay device 13 are subjected to complex addition by an adder 21. The delay output of a delay device 12, and the delay output of a delay device 14 are subjected to complex addition by an adder 22. In a subtracter 23, the added result of the adder 21 and the added result of the adder 22 are subjected to complex subtraction. That is to say, the output of the subtracter 23 is obtained in such a way that orthogonal patterns in which a correlation value obtained by a correlator 10 is multiplied by +1 and multiplied by -1 alternately in each symbol are added regarding four symbols. A subtracted result is subjected to complex squaring by a complex-square computing unit 30 so as to be averaged by an averaging symbol number N (=4) by an averaging circuit 40, and an interference power amount is found. |
