| 摘要 |
PROBLEM TO BE SOLVED: To provide a MOS solid-state image pickup device, the circuit scale of which is furthermore made compact by eliminating the need for sample-hold circuits(S/H circuit) which have been employed for a conventional correlated double sampling(CDS) processing. SOLUTION: A CDS circuit 20 consists of clamp circuits 21, 22, that clamp the output signal of the solid-state image pickup device to a signal level and S/H circuits 24, 25 that sample the voltage difference between the clamped signal level and a reference level. A 1st clamp pulse CP1 is applied to the CDS circuit 20, before the stored electric charges of the solid-state image pickup device are reset so as to first clamp the output signal to the signal level and a 2nd clamp pulse CP2 is applied to the CDS circuit 20, after the stored electric charges of the solid-state image pickup device have been reset to apply sample- holding processing to the voltage difference, to allow the CDS circuit 20 to conduct the clamping and the sample-holding processing along the stream of the signals (time flow) outputted from the solid-state image pickup device, thereby eliminating the need for the S/H circuit, that delays the signal level for a prescribed period, in the inside of the solid-state image pickup device.
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