发明名称 I/O circuit of semiconductor integrated device
摘要 An input circuit of a semiconductor integrated circuit device includes a PMOS transistor P11 provided between an internal power supply VDD and a node S13; a PMOS transistor P12 which is provided between a node I/O to which a signal is input from an external circuit and the node S13, a POS transistor P15 which is provided between the node S13 and the node W11; and NMOS transistor N16 which controls the potential of the node S11 on the basis of the potential of the node I/O; and a second circuit which controls the potential of a node S14 on the basis of the potential of the node I/O.
申请公布号 US2002040984(A1) 申请公布日期 2002.04.11
申请号 US20010867531 申请日期 2001.05.31
申请人 KAWANO HARUMI;SUSHIHARA AKIHIRO 发明人 KAWANO HARUMI;SUSHIHARA AKIHIRO
分类号 H03K19/0175;H03K19/003;(IPC1-7):H01L31/033 主分类号 H03K19/0175
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