发明名称 Semiconductor integrated circuit device and the process of the same
摘要 A gate electrode of MISFET Qs for information transmission in a memory cell-forming region is constituted of a built-up film of a polysilicon film and a W film, and gate electrodes of n channel-type MISFET Qn1 and p channel-type MISFET's QP1, Qp2 in a peripheral circuit-forming region are each constituted of a built-up film of a polysilicon and a CoSi layer. The CoSi layer is formed on a source and a drain of these MISFET's, and any CoSi layer is not formed on a source and a drain of the MISFET for information transmission. As a result, refresh characteristics of a memory cell can be improved, and contact holes can be formed in high precision over the CoSi layer.
申请公布号 US2002042172(A1) 申请公布日期 2002.04.11
申请号 US20010961059 申请日期 2001.09.24
申请人 HITACHI, LTD. 发明人 KURODA KENICHI;WATANABE KOZO
分类号 H01L27/088;H01L21/60;H01L21/768;H01L21/8234;H01L21/8238;H01L21/8242;H01L21/8244;H01L27/10;H01L27/105;H01L27/108;H01L27/11;H01L29/49;(IPC1-7):H01L21/336 主分类号 H01L27/088
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