发明名称 METHOD TO DESCRAMBLE THE DATA MAPPING IN MEMORY CIRCUITS
摘要 An automatic method for the generation of a logical hardware test pattern in memory circuits is based on a given physical pattern. The method includes the backwards transformation from a given set of logical data pattern. Since the method is automatic, no knowledge of the data scrambling inside the memory circuit is required.
申请公布号 WO0229825(A2) 申请公布日期 2002.04.11
申请号 WO2001US27001 申请日期 2001.08.30
申请人 INFINEON TECHNOLOGIES NORTH AMERICA CORP.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 LEHMANN, GUNTHER;FRANKOWSKY, GERD;HSU, LOUIS L.;REITH, ARMIN
分类号 G01R31/3183;G01R31/319;G11C29/10;G11C29/56 主分类号 G01R31/3183
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