发明名称 Receiving circuit
摘要 Disclosed herein is a receiving circuit comprising demodulator 101 which pulls in the phase of each of burst signals respectively having preambles 701 and 711 each storing phase information or data therein, synchronous pattern parts 702 and 712 each storing synchronous information therein, and data parts 703 and 713 each storing the data therein, and outputs data obtained by demodulating the burst signal, a controller 110 which performs counting based on the demodulated data to output a timing signal, and a storage unit 102 which stores or outputs the demodulated data, based on the timing signal.
申请公布号 US2002041638(A1) 申请公布日期 2002.04.11
申请号 US20010894533 申请日期 2001.06.29
申请人 YAMAZAKI KIYOHIKO 发明人 YAMAZAKI KIYOHIKO
分类号 H04L27/38;H04J3/00;H04L7/04;H04L7/10;H04L27/22;(IPC1-7):H04L27/06 主分类号 H04L27/38
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