Use of a thin nitride spacer in a split gate embedded analog process

摘要

A mixed voltage CMOS process for high reliability and high performance core transistors and input-output and analog transistors with reduced mask steps. A patterned silicon nitride film 160 is used to selectively mask various implant species during the formation of the LDD regions 180, 220, and the pocket regions 190, 230 of the core transistors 152, 154. The LDD regions 240, 200 of the I/O or analog transistors 156, 158 are simultaneously formed during the process.