发明名称 METHOD AND DEVICE FOR INSPECTING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a method and a device for inspecting semiconductor integrated circuit achieving a significant reduction of the test time and a highly precise test regardless of the measuring accuracy of a judging module. SOLUTION: Set values of a reference power supply voltage are divided into 10 V and 0 V as an upper limit value and a lower limit value of a driving voltage specification of a liquid crystal driver. A reference power supply potential difference of 10 V can be developed between V1-V2 of the reference power supply terminal. Gradation levels included between V1-V2 of the reference power supply terminal are made a target of the test, so that each adjacent gradation output level can retain a potential difference of about 200 mV (a potential difference between reference supply terminals 10,000 mV/gradation levels 51) with each other. For the gradation levels included between the reference supply terminals, all the gradation levels included in the interval are tested by testing while switching input data and a decision level of a comparator in sequence for every one gradation level.
申请公布号 JP2002107423(A) 申请公布日期 2002.04.10
申请号 JP20000299844 申请日期 2000.09.29
申请人 SHARP CORP 发明人 UCHIDA REN
分类号 G01R31/316;G01R31/28;G01R31/3183;G02F1/133;H01L21/822;H01L27/04;H03M1/10;H03M1/76;(IPC1-7):G01R31/316;G01R31/318 主分类号 G01R31/316
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