发明名称 Flip-flop circuit
摘要 In a flip-flop circuit, a master latch has a data input circuit that reads data when a clock input signal is at a first level. When the clock input signal is at a second level, a first data holding circuit holds the data, and a signal switching circuit transfers the data to a slave latch. The slave latch reads the data from a data output circuit when the clock input signal is at the second level. When the clock input signal returns to the first level, a second data holding circuit holds the data read from the data output circuit.
申请公布号 US6369629(B1) 申请公布日期 2002.04.09
申请号 US19980192505 申请日期 1998.11.17
申请人 SHARP KABUSHIKI KAISHA 发明人 SATO YUICHI
分类号 H03K3/037;H03K3/3562;(IPC1-7):H03K3/289 主分类号 H03K3/037
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