TEST PATTERN FOR CHECKING DEFECTS IN SEMICONDUCTOR DEVICE

摘要

PURPOSE: A test pattern for checking defects in a semiconductor device is provided to be capable of easily checking defects generated in each layer. CONSTITUTION: In a semiconductor device having a plurality of patterns composed of the first polysilicon layer(41) and a silicide layer(42), a test pattern comprises the first, second and third test pattern. The first test pattern checks the defects of each first polysilicon layer(41) by connecting two test pads using the second polysilicon. The second test pattern checks the defect of each silicide layer(42) by connecting two test pads using metal films. The third test pattern checks the contact defect between the first polysilicon layer(41) and the silicide layer(42) by connecting two test pads(43,43'), wherein the silicide layers(42) are connected to the metal films(45) and the first polysilicon layers(41) are connected to the second polysilicon layers(44).