发明名称 PLANAR DISPLAY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a planar display device which accurately generates an output inhibition time t1 and a gate delay time t2. SOLUTION: An output inhibition O1 having a pulse width of the time t1 is generated by a first multivibrator 34. A delay signal OE2 having a pulse width of the time t2 is generated by a second multivibrator 36. Thus, a delaying of leading and a delaying of a gate signal Vg are accurately conducted.
申请公布号 JP2002099235(A) 申请公布日期 2002.04.05
申请号 JP20000290781 申请日期 2000.09.25
申请人 TOSHIBA CORP 发明人 KODA SHUICHI
分类号 G02F1/133;G09G3/20;G09G3/36;(IPC1-7):G09G3/20 主分类号 G02F1/133
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