| 摘要 |
PROBLEM TO BE SOLVED: To provide a PLL circuit for avoiding the use of an asynchronous digital circuit or analog circuit and performing high integration. SOLUTION: This PLL circuit is provided with a VCO 10 for outputting output analog signals, based on the voltage of input analog signals, a comparison digital signal output part 20 for outputting the comparison digital signals of a frequency Flo, for which the frequency of local analog signals is subtracted from the frequency Fa+Δf of the output analog signals; a digital multiplier 30 for multiplying the comparison digital signals and target digital signals outputted by a DDS 50; a digital loop filter 32 for extracting the components of low-frequency bands among the output of the digital multiplication means and an input analog signal output part 40 for outputting the input analog signals, based on the output of the digital loop filter 32. A digital circuit is used for the measurement of a phase difference between the comparison digital signals and the target digital signals and the high integration of the PLL circuit is made possible. |
