发明名称 CONTROL METHOD FOR MULTIPROCESSOR SYSTEM WITH PLURAL NODES
摘要 <p>PROBLEM TO BE SOLVED: To reduce the number of pins of a LSI element which connect nodes in a multiprocessor system that has plural nodes and makes an instruction correspond to data by an ID number. SOLUTION: The ID number is composed of a node number that is uniquely determined in this system and a sub ID number that is uniquely determined at each node. When an instruction is issued, the ID number of the instruction issuing source is stored in the node number of the ID number, and the ID number of a data transfer destination is stored in an ID number that is added to data. A crossbar switch for connecting nodes is provided with a node number interchanging means. The crossbar, if the data has a read request transfer mode, does not interchange the node number of ID number of the data, if the data has a write request transfer mode, interchanges the node number of ID number of the data with a data transfer source node number, and then makes the instruction correspond to the data using an ID number comparison circuit in the node.</p>
申请公布号 JP2002099520(A) 申请公布日期 2002.04.05
申请号 JP20000295462 申请日期 2000.09.25
申请人 HITACHI LTD 发明人 KUGE JUNKO;SAKAKIBARA TADAYUKI;AKASHI HIDEYA
分类号 G06F15/173;G06F13/38;G06F15/177;(IPC1-7):G06F15/177 主分类号 G06F15/173
代理机构 代理人
主权项
地址