发明名称 METHOD AND DEVICE FOR CONTROLLING CLOCK
摘要 <p>PROBLEM TO BE SOLVED: To solve such a problem that the number of terminals increases since an interruption request from the outside of a processor is required in a conventional clock decelerating method. SOLUTION: When executing specified instructions, the execution of these instructions is automatically detected by hardware and on the basis of the detected information, the operation of a frequency divider 160 to input a source clock 150 is started. Then, a clock dividing the frequency of the source clock 150 is defined as an operating clock 170 of the processor so that the entire processor can be operated at a low speed.</p>
申请公布号 JP2002099348(A) 申请公布日期 2002.04.05
申请号 JP20000286719 申请日期 2000.09.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MARUI SHINICHI
分类号 G06F1/32;G06F1/04;G06F9/30;(IPC1-7):G06F1/04 主分类号 G06F1/32
代理机构 代理人
主权项
地址