发明名称 |
VCO circuit with wide output frequency range and PLL circuit with the VCO circuit |
摘要 |
A voltage-controlled oscillating circuit according to the present invention includes: a drive voltage generating circuit outputting a bias voltage according to a control voltage; and a ring oscillator circuit receiving supply of the bias voltage to operate. The drive voltage generating circuit generates the bias voltage using a feedback circuit formed by an operational amplifier receiving supply of a power source voltage to operate. Therefore, an influence of a high frequency component overlapped on the power source voltage, that is an influence of noise, is suppressed, thereby enabling stable generation of an output clock having a small variation in phase.
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申请公布号 |
US2002039051(A1) |
申请公布日期 |
2002.04.04 |
申请号 |
US20010884931 |
申请日期 |
2001.06.21 |
申请人 |
ITO YOSHIAKI;OTA YOSHIYUKI |
发明人 |
ITO YOSHIAKI;OTA YOSHIYUKI |
分类号 |
H03K3/03;H03L7/093;H03L7/099;(IPC1-7):H03B5/02 |
主分类号 |
H03K3/03 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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