In one embodiment, a processor contains multiple instruction sources and selects the proper source to provide an instruction to the decoder. Each of the instruction sources may provide an instruction to a multiplexer. The instruction sources also provide a signal to a second multiplexer indicative of the size of the instruction.
申请公布号
WO0227482(A2)
申请公布日期
2002.04.04
申请号
WO2001US30261
申请日期
2001.09.25
申请人
INTEL CORPORATION;ANALOG DEVICES, INC.
发明人
OVERKAMP, GREGORY, A.;ROTH, CHARLES, P.;SINGH, RAVI, P.