发明名称 Delay circuit and ring oscillator incorporating the same
摘要 A delay circuit in accordance with the present invention includes: a first I2L inverter and a second I2L inverter connected in cascade with each other; and a capacitor interposed between a ground and a connecting point of the first and second inverters, wherein: the delay circuit further includes a current adjusting circuit having at least one third I2L inverter with a plurality of output terminals at least one of which is connected to an input terminal of the third I2L inverter; and the current adjusting circuit is connected to adjust a charge current of the capacitor. The configuration provides a delay circuit of simple circuit structure that accounts for a small area in an integrated circuit and that is capable of introducing any given delay and also provides a ring oscillator incorporating the delay circuit.
申请公布号 US2002039036(A1) 申请公布日期 2002.04.04
申请号 US20010945654 申请日期 2001.09.05
申请人 INAMORI MASANORI;SAKURAI SYOUJI;FUJIYAMA TOSHIYA;DOI HIROKI 发明人 INAMORI MASANORI;SAKURAI SYOUJI;FUJIYAMA TOSHIYA;DOI HIROKI
分类号 H03H11/26;H03K3/03;H03K5/00;H03K5/13;(IPC1-7):H03C3/00 主分类号 H03H11/26
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