发明名称 |
Execution control apparatus of data driven information processor |
摘要 |
An execution control apparatus of a data driven information processor includes: an instruction decoder that outputs the number of inputs of an instruction; a waiting data storage region that stores N(N>=2) waiting data and respective data valid flags in one address; a constant storage that stores constants and a constant valid flag; a constant readout unit that reads out a constant and a constant valid flag from the constant storage with the node number of the packet as the address; a unit that calculates the address and selects a process for data waiting depending upon a combination of a data valid flag, a constant valid flag, and the number of instruction inputs; and a unit that performs the waiting process in response to the select signal.
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申请公布号 |
US2002040426(A1) |
申请公布日期 |
2002.04.04 |
申请号 |
US20010833653 |
申请日期 |
2001.04.13 |
申请人 |
KAMITANI SHINGO;HATAKEYAMA KOUICHI |
发明人 |
KAMITANI SHINGO;HATAKEYAMA KOUICHI |
分类号 |
G06F15/82;G06F9/44;(IPC1-7):G06F9/30 |
主分类号 |
G06F15/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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