发明名称 Schaltung zur Bewegtbilddecodierung
摘要 <p>When a macro block (MB) synchronizing signal (MBSYNC) indicating starting of processing is asserted in processing of one processing section which is formed by a macro block header and a macro block, block data of the macro block (MB) are decoded in synchronization with the assertion of MBSYNC, and next macro block header information is analyzed in continuation in the processing section. The assertion of the next MB synchronizing signal is stopped until prescribed conditions are established. Processing of the block data of the macro blocks is regularly executed from starting of one processing section, whereby utilization efficiency of operational processors is improved. &lt;IMAGE&gt;</p>
申请公布号 DE69613873(T2) 申请公布日期 2002.04.04
申请号 DE1996613873T 申请日期 1996.02.16
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO 发明人 URAMOTO, SHINICHI;TAKABATAKE, AKIHIKO
分类号 H04N19/50;G06T9/00;H03M7/00;H03M7/36;H04N19/423;H04N19/436;H04N19/44;H04N19/503;H04N19/577;H04N19/587;H04N19/60;H04N19/61;H04N19/625;H04N19/65;H04N19/70;H04N19/80;H04N19/89;H04N19/895;H04N19/91;H04N19/93;(IPC1-7):G06T9/00;H04N7/50 主分类号 H04N19/50
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