| 摘要 |
A photodetector array includes a plurality of photodetectors (PD1, PD2), preferably photodiodes, coupled to a respective plurality of addressable interface circuits (24). At each pixel, a switching circuit (S1, S2) configures neighboring ones of the photodetectors into pixels by summing multiple photodetector signals into an aggregated pixel output signal. The switching circuit is electronically switchable to aggregate said photodetector signals according to at least two different selectable pixellization schemes with differing resolution. |
