| 摘要 |
A key scheduler for apparatus using a Data Encryption Standard (DES) encryption algorithm with eight rounds includes a first permutation choice unit 800 for permuting a 56 bit block, first and second registers 810, 820 for storing the left 28 bits and right 28 bits respectively of the 56 bit block from the first permutation choice unit, and a second permutation choice unit 850 for permuting the 28 bits stored in these registers to generate a first sub-key k<SB>m</SB>. First and second shift units 830, 840 shift the 28 bit blocks to the left by a first predetermined number of bits and the resulting blocks are looped back to the first and second registers. Third and fourth shift units 860, 870 shift the 28 bit blocks stored in the registers to the left by a second predetermined number of bits and a third permutation choice unit 880 uses the results to generate a second sub-key k<SB>n</SB>. In a second embodiment the third and fourth shift units shift to the right.
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