| 摘要 |
A duty ratio correction circuit includes a pair of circuit blocks each having an input stage inverter for receiving one of complementary clock signals, a first waveform correction circuit for receiving an output from a corresponding one of the input stage inverter, and a second waveform correction circuit for receiving the other of the complementary signals. Each of the waveform correction circuits has a lower output impedance at an initial stage of signal transition of the input signal and a higher output impedance at a subsequent stage of the signal transition.
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