发明名称 Integrate and fold analog-to-digital converter with saturation prevention
摘要 An analog to digital conversion circuit for converting an analog input signal into a plurality of binary output bits includes an operational amplifier and an integrating capacitor for storing a charge proportional to the integral of the input signal. A charge subtracting circuit removes a first predetermined charge from the integrating capacitor when an output charge of the operational amplifier is substantially equal to a second predetermined charge. The first predetermined charge level is removed from the integrating capacitor a number of times. The removal of the first predetermined charge from the integrating capacitor allows the integral of the analog input signal to be larger than a maximum charge capable of being stored by the integrating capacitor. A digital logic circuit tracks the number of times that the first predetermined charge is removed from the integrating capacitor by the charge subtracting circuit, and the digital logic circuit provides at least one bit of the plurality of binary output bits. A residue quantizing circuit determines a residual charge in the integrating capacitor and provides at least one additional bit of the plurality of binary output bits corresponding to the residual charge. The residual charge is substantially equal to a stored charge in the integrating capacitor after the first predetermined charge has been removed the number of times.
申请公布号 US6366231(B1) 申请公布日期 2002.04.02
申请号 US20000546623 申请日期 2000.04.10
申请人 GENERAL ELECTRIC COMPANY 发明人 RAO NARESH KESAVAN;HARRISON DANIEL DAVID;MCGRATH DONALD THOMAS;TIEMANN JEROME JOHNSON
分类号 H03M1/44;H03M1/14;H03M1/52;(IPC1-7):H03M1/50 主分类号 H03M1/44
代理机构 代理人
主权项
地址