| 摘要 |
PROBLEM TO BE SOLVED: To provide a cache controller capable of sampling an address, at which a cache memory is accessed, inside the cache memory. SOLUTION: The controller has plural cache memories 10 and 20 at least a partial area of which are used as an address information recording area, an address counter 15 for showing an address to store address information and showing the next address when access to the cache memory occurs, a switching means 11 for inputting address information outputted from the address counter to the address terminal of the cache memory when a trace signal showing sampling of address information is outputted, and a switching means 12 for inputting address information for accessing the cache memory to the data terminal of the cache memory when the trace signal is outputted, and the address information is recorded in the address shown by the address counter 15 in the address information recording area.
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