发明名称 LEVEL CONVERSION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a level conversion circuit that can prevent deterioration in jitter characteristics due to fluctuations in an output voltage level of a full differential amplifier circuit being a component of the level conversion circuit caused by fluctuations in the frequency or amplitude of an input signal. SOLUTION: The level conversion circuit consists of the full differential amplifier circuit comprising a couple of PMOSTs 1, 2 connected between a pair of level shift circuits 200, 300 and comprising three NMOSTs 3-5, of a limiter circuit comprising a couple of NMOSTs 6, 7 connected to an output side of the full differential amplifier circuit, of a common source ground circuit, comprising 4 pairs of PMOSTs 8-11 and NMOSTs 12-15 and of a couple of inverter circuits 100, 101.
申请公布号 JP2002094367(A) 申请公布日期 2002.03.29
申请号 JP20000277867 申请日期 2000.09.13
申请人 NEC ENG LTD 发明人 TONO KATSUHIKO
分类号 H03K19/0185;(IPC1-7):H03K19/018 主分类号 H03K19/0185
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